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Papers tagged with "Pga"
DESIGN AND IMPLEMENTATION OF AN FPGA BASED SMART TRAFFIC LIGHT CONTROL SYSTEM USING CAMERA BASED VEHICLE DETECTION
Traffic Congestion Is A Major Challenge In Rapidly Growing Urban Areas, While Conventional Fixed-time Traffic Signals Cannot Respond Effectively To Changing Traffic Density. This Paper Presents A Camera-based Smart Traffic Light Control Sys...
Design And FPGA Implementation Of A Secure UART Architecture Integrating AES-128 Encryption And SECDED Error Correction
This Paper Presents An FPGA-oriented Secure UART Architecture Combining AES-128 Confidentiality With SECDED Protection Against Transmission Faults. Sixteen 8-bit Plaintext Bytes Are Buffered Into A 128-bit AES Block, Encrypted, And Protecte...
A Sparsity-Aware Operand-Isolated Systolic Array Accelerator For Power-Efficient CNN Inference On FPGA
CNN Inference On FPGA Platforms Can Incur Substantial Dynamic Power Because Parallel Multiply-accumulate Datapaths May Continue Switching When Sparse Operands Contain Zeros. This Paper Presents A Sparsity-aware Operand-isolated Systolic Arr...
Adaptive Lightweight Encryption-Based Secure UART Architecture For IoT Devices
The Rapid Growth Of IoT Applications Requires Secure, Energy-efficient, And Reliable Communication For Resource-constrained Devices. UART Is Widely Used In IoT Systems Due To Its Simplicity And Low Hardware Cost, But Conventional Secure UAR...
Static Timing Analysis–Aware RTL Design Of A Simple RISC Processor Using Verilog HDL
As The Demands For Higher Clock Frequencies In Modern VLSI Systems Continue To Rise, Achieving Timing Closure Has Become A Significant Hurdle In Digital Design. Many RTL Designs Struggle To Meet Setup And Hold Time Requirements After Synthe...
DESIGN OF VLSI-BASED HARDWARE DETECTION SYSTEM AGAINST POWER SIDE-CHANNEL ATTACKS
The Rapid Growth Of System-on-Chip (SoC) Technologies Has Increased Their Vulnerability To Advanced Physical And Power Side-channel Attacks, Which Can Compromise The Security Of Integrated Circuits. Conventional Countermeasures Often Involv...
Area - Delay - Power Efficient Carry Select Adder
In Modern VLSI Design, Arithmetic Circuits Are Fundamental Components That Directly Influence The Performance, Power Consumption, And Silicon Area Of Digital Systems. The Carry Select Adder (CSLA) Is One Of The Most Widely Used High-speed A...
UART WITH FIFO FOR SERIAL COMMUNICATION
Universal Asynchronous Receiver Transmitter (UART) Has Continued To Be Among The Basic Serial Communication Protocols Within The Embedded Systems And Digital Design. Although Used Extensively, Traditional UART Designs Have The Disadvantage...
FPGA Implementation Of Brain-Inspired Neuromorphic Computing Circuits
Brain-inspired Neuromorphic Computing Has Emerged As An Efficient Approach For Implementing Cognitive And Learning-based Systems With Low Power Consumption And High Parallelism. Unlike Conventional Computing Architectures, Neuromorphic Syst...
Energy-Efficient VLSI Architectures For Intelligent Biomedical Signal Processing: Review
Recent Advancements In VLSI Technology Have Significantly Transformed Biomedical Signal Processing Systems By Enabling Ultralow-power, Compact, And Intelligent Hardware Platforms For Continuous Health Monitoring. In Particular, Electrocardi...
DEVELOPING AN ISLANDING ARRANGEMENT FOR GRID ON SENSING BAD VOLTAGE/ BAD FREQUENCY
This Paper Presents The In Modern Power Systems, The Growing Penetration Of Distributed Generation (DG) Units Such As Photovoltaic Arrays, Wind Turbines, And Microturbines Poses Significant Challenges To Grid Reliability And Stability Durin...
DESIGN AND ANALYSIS OF EFFICIENT OF 32 BIT APPROXIMATE MULTIPLIER COMPRESSORS
Approximate Computing Has Become An Emerging Technique To Reduce Power Consumption. In Numerous Applications, Multiplication Is A Crucial Operation, Designing It For Approximation Is Effective In Optimizing System Performance. In This Paper...
A NOVEL PIPELINED TECHNIQUE FOR IMAGE ENCRYPTION & DECRYPTION BASED ON AES CRYPTOGRAPHY
The Project Presents A Fault-efficient Advanced Encryption Standard (AES) Design For Image Cryptography, Focusing On Customizing SubBytes And MixColumns, Which Are The Most Critical Hardware Components. The Proposed AES Architecture, Implem...
DESIGN AND DEVELOPMENT OF FPGA BASED TEMPERATURE AND LIGHT INTENSITY MEASUREMENT SYSTEM USING UART PROTOCOL
In This, Develop An Efficient FPGA Based Temperature And Light Intensity Measurement System To Reads The Temperature And Light Intensity Values Through XADC Using UART Protocol And Displays It On LCD Updated To Every Second Time Period. The...
HIGH SPEED UNIVERSAL SHIFT REGISTER
As Technologies Like AI Are Evolving Much Faster, There Is Need For Improving The Performance Of The Computers For Fast And Effective Computing. Fast Computing Involves Loading And Unloading Data Faster To The Register. Universal Shift Regi...