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Papers tagged with "Secded"
Vol 12, Issue 8 (August 2026)
Electronics And Communication Engineering
Design And FPGA Implementation Of A Secure UART Architecture Integrating AES-128 Encryption And SECDED Error Correction
This Paper Presents An FPGA-oriented Secure UART Architecture Combining AES-128 Confidentiality With SECDED Protection Against Transmission Faults. Sixteen 8-bit Plaintext Bytes Are Buffered Into A 128-bit AES Block, Encrypted, And Protecte...
Hasmi P N, Dr. P. Sivasankar, Dr. G.Kulanthaivel