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design of low-power high-gain serializer/deserializer using gdi technique
CMOS Technology Is Evolving Propose And Demonstrate A Serializer/deserializer (SerDes) Toward The Testing Of Large Scale GDI Circuits With Delay-line Clocking. A SerDes, A Pair Of A Serializer (parallel-to-serial Converter) And A Deserializ...
VLSI IMPLIMENTATION OF FULL SUBTRACTOR USING SPLIT-RAIL CHARGE RECOVERY LOGIC
CMOS Technology Is Evolving Rapidly With The Advancement In VLSI Design. The Gate Count On The Integrated Chip Is Steadily Rising Which Leads To Enhanced Power Dissipation And Heat Generation. Therefore, A New Paradigm That Can Circumvent T...
IMPLEMENTATION OF TWO PHASE CLOCKED ADIABATIC STATIC CMOS LOGIC FULL ADDER DESIGN FOR EFFICIENT POWER DISSIPATION
An Efficient Power Dissipation With Adiabatic Logic Using 2 Phase Adiabatic Static CMOS Logic (2PASCL) Has Been Presented. In This Research Work Adiabatic Logic Is Mainly Used To Minimize The Energy Loss During The Operation Of The Circuit....
DESIGN OF 64-BIT ARITHMETIC LOGIC UNIT (ALU) BASED ON BSIM4 MODEL USING TANNER
Arithmetic Circuits Play A Vital Role In Computational And Digital Circuits. Arithmetic Logic Unit (ALU) Can Perform Various Arithmetic And Logical Functions. Proposed 64-bit ALU Comprises Of Different Arithmetic Functions Such As Addit...
SOLAR POWERED STIRLING ENGINE
The Aim Of This Project Is To Design, Build, And Test A Stirling Engine Capable Of Generating Between 200-500 Watts Of Electricity. Here, We Are Using Parabolic Dish Reflectors To Concentrate The Solar Rays On The Hot End Of The Engine....