Volume 9, Issue 6 (June 2023)

Vlsi Implimentation Of Full Subtractor Using Split-rail Charge Recovery Logic

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Author(s)

K. Palanisamy V.Soundappan

Abstract

CMOS Technology Is Evolving Rapidly With The Advancement In VLSI Design. The Gate Count On The Integrated Chip Is Steadily Rising Which Leads To Enhanced Power Dissipation And Heat Generation. Therefore, A New Paradigm That Can Circumvent These Limitation

Keywords

Adiabatic Logic Recovery Of Energy Low Power Power Dissipation.

Paper ID

IJSARTV9I666112

Publication Date

June 13, 2023

Research Area

ECE

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