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Papers tagged with "2pascl"
Vol 4, Issue 5 (May 2018)
Electronics And Communication Engineering
IMPLEMENTATION OF TWO PHASE CLOCKED ADIABATIC STATIC CMOS LOGIC FULL ADDER DESIGN FOR EFFICIENT POWER DISSIPATION
An Efficient Power Dissipation With Adiabatic Logic Using 2 Phase Adiabatic Static CMOS Logic (2PASCL) Has Been Presented. In This Research Work Adiabatic Logic Is Mainly Used To Minimize The Energy Loss During The Operation Of The Circuit....
Dr.C.Venkatesh , A.Mohanapriya