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Papers tagged with "Ddcg"
Vol 4, Issue 4 (April 2018)
Electronics And Communication Engineering
DESIGN OF MODIFIED DATA DRIVEN CLOCK GATING AND LOOK AHEAD CLOCK GATING FOR LOW POWER
Clock Signal Is Considered As An Immense Source Of Power Dissipation In Synchronous Circuits Because Of Large Frequency And Load. It Does Not Carry Any Information But Consumes High Power At The Switching Activity Which Is To Be Avoided. So...
V.Nirmaladevi, Mrs.Angel Prabha