Volume 5, Issue 4 (April 2019)

Design Of Low Power Three Stage Miller Compensated Operational Amplifier Using 25nm Technology

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Author(s)

Priyanshi Dhupiya Prof. UBS Chandrawat

Abstract

This Manuscript Depicts The Implementation Of New Design For Low Power Three Stage Operational Amplifier Using Miller Compensation Technique To Increase The Voltage Gain. Here The Circuit Is Designed And Simulated By Tanner EDA Tool Using 25 Nm CMOS Techn

Keywords

OPAMP UGB Tanner CMOS

Paper ID

IJSARTV5I430045

Publication Date

April 10, 2019

Research Area

Electronics & Communication

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