Performance Analysis Of Power Gating Design In Low Power Vlsi Circuits

• Author(s):

  S Pranesh | V Premsai | L J Saurav | S vasanthiriya

• Keywords:

  ALU, HDL, IOT

• Abstract:

  In Modern Digital Systems, Power Efficiency Is A Critical Design Parameter, Especially In Applications Like Mobile Devices, IoT, And Embedded Systems. Clock Gating Is A Widely-used Technique For Reducing Dynamic Power Consumption By Disabling The Clock Si

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Other Details

• Paper id:

  IJSARTV11I3102740

• Published in:

  Volume: 11 Issue: 3 March 2025

• Publication Date:

  2025-03-05

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