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Papers tagged with "Svl"
Vol 4, Issue 7 (July 2018)
VLSI System Design
LOW POWER PULSE TRIGGERED D-FLIP FLOPS USING MTCMOS AND SELF CONTROLLABLE VOLTAGE LEVEL CIRCUIT
Reducing Power Consumption Is A Crucial Task For Any Circuits. Increased Demand For Portable Devices With Reduced Power Dissipation Has Put Necessary Traction To Design Low Power Circuits. Both Explicit And Implicit Pulse Triggered Flip Flo...
E.Sudhakar, B.Santhosh Kumar, Sahebgoud Karaddi