Volume 4, Issue 3 (March 2018)

High Performance Integer Dct Architectures For Hevc

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Author(s)

V.Sruthi V.Rekha M. Subitha, M.Sugitha S. Jeya Anusuya, V. Satheesh kumar

Abstract

Our Proposed System Proceeds VLSI Architecture For Integer Discrete Cosine Transform (integer DCT), Which Is Used In Real Time High Efficiency Video Coding (HEVC) Applications. It Has N-point 1D-Integer DCT Architecture, Which Includes Signed Configurable

Keywords

Integer DCT HEVC 1D DCT Architecture 2D DCT Architecture

Paper ID

IJSARTV4I321202

Publication Date

March 4, 2018

Research Area

Electronics And Communication Engineering

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