Fpga Implementation Of Low Power Parallel Multiplier

• Author(s):

  U.Meiyarasan | G.Sathishkumar | M.Selvakumar | Dr. J.Rangarajan

• Keywords:

  Low Power, Multiplier, Reduced Switching.

• Abstract:

  In The Fast Growing Communication Field, Requirements Of Low Power Designs Are Increasing To Reduce The Power Losses And Decrease The Thermal Losses In The Same Ratio.Multiplier Is An Arithmetic Circuit That Is Extensively Used In Common DSP And Communica

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Other Details

• Paper id:

  IJSARTV11I3102785

• Published in:

  Volume: 11 Issue: 3 March 2025

• Publication Date:

  2025-03-12

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