DESIGN HIGH SPEED MULTIPLIER USING VEDIC MATHEMATICS FOR IIR FILTER |
Author(s): |
Pratibha P. Dighe |
Keywords: |
Vedic Mathematics, Multiplier, DSP, IIR Filter, Urdhwa Tiryagbhyam Sutra, MATLAB 8.1, Xilinx 14.5 ISE. |
Abstract |
Digital signal processing operation utilizing Vedic mathematics which performs the signal handling operation like convolution, circular convolution, cross correlation, auto-correlation and filter design. Digital signal processing (DSP) operations are vital part of engineering and medical field. Outlining of DSP operations have numerous methodologies. This configuration procedure gives the analysis of signals to enhance the accuracy of the mathematical calculations. It encourages the time sharing for all signals to process mathematical operations all the while. Vedic mathematics is the ancient math which has a unique method of mental calculation with the assistance of basic rules and standards based on sutras. The utilization of multiplier has demonstrated the efficiency of Urdhva-Tiryakbhayam method for multiplication which conveys a distinction in the real procedure of multiplication itself. The configuration of IIR filters utilizing Urdhva-Tiryakbhayam sutra. This calculation is performed in Xilinx and compare with MATLAB operation of IIR filter respectively. |
Other Details |
Paper ID: IJSARTV Published in: Volume : 4, Issue : 9 Publication Date: 9/1/2018 |
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