POWER REDUCTION TECHNIQUES IN VLSI USING 8X10 ENCODER & 10X8 DECODER WITHOUT RIPPLE COUNTER

• Author(s):

  S Rama Mohan Reddy | T.Bathinababu

• Keywords:

  Xilinx; Verilog; Altera QUARTUS-II;8x10 Encoder And 10x8 Decoder; Pulseclock;

• Abstract:

  In Today’s Time The VLSI Industry Is Growing Rapidly And It Demands For The Devices Which Consume Less Power And There Is No Impact On Their Performance. Maintaining The Performance With Less Power Consumption Is The Big Task For The Engineers. Therefore,

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Other Details

• Paper id:

  IJSARTV3I515335

• Published in:

  Volume: 3 Issue: 5 May 2017

• Publication Date:

  2017-05-23

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