LOW POWER PULSE TRIGGERED D-FLIP FLOPS USING MTCMOS AND SELF CONTROLLABLE VOLTAGE LEVEL CIRCUIT

• Author(s):

  E.Sudhakar | B.Santhosh Kumar | Sahebgoud Karaddi

• Keywords:

  Conditional Discharge Flip Flop (CDFF); Conditional Data Mapping Flip Flop (CDMFF); Clocked Pair Shared Flip Flop (CPSFF); MTCMOS; SVL

• Abstract:

  Reducing Power Consumption Is A Crucial Task For Any Circuits. Increased Demand For Portable Devices With Reduced Power Dissipation Has Put Necessary Traction To Design Low Power Circuits. Both Explicit And Implicit Pulse Triggered Flip Flops Are Designed

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Other Details

• Paper id:

  IJSARTV4I724345

• Published in:

  Volume: 4 Issue: 7 July 2018

• Publication Date:

  2018-07-06

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