DESIGN OF MODIFIED DATA DRIVEN CLOCK GATING AND LOOK AHEAD CLOCK GATING FOR LOW POWER

• Author(s):

  V.Nirmaladevi | Mrs.Angel Prabha

• Keywords:

  Multibit Flipflop,DDCG,LACG,Clock Gating

• Abstract:

  Clock Signal Is Considered As An Immense Source Of Power Dissipation In Synchronous Circuits Because Of Large Frequency And Load. It Does Not Carry Any Information But Consumes High Power At The Switching Activity Which Is To Be Avoided. So, By Using Cloc

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Other Details

• Paper id:

  IJSARTV4I422982

• Published in:

  Volume: 4 Issue: 4 April 2018

• Publication Date:

  2018-04-23

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