64 BIT VEDIC MULTIPLIER WITH HIGH FAULT COVERAGE

• Author(s):

  Renuka Talekar | Mayuri Chawla | Parinay Lavatre

• Keywords:

  Vedic Multiplier,Urdhva Tiryakbhyam Method, Vedic Mathematics ,64 Bit Multiplier ,Vedic Mathematics.

• Abstract:

  The 64 Bit Vedic Multiplier Using Urdhava Tiryakbhyam Method Is Proposed. The ALU Is The Heart Of Any Processor Or The Any Complex System .To Increase The Speed Of Any System, It Is Required To Increase The Speed Of ALU, But With Low Power Consumption And

---

Other Details

• Paper id:

  IJSARTV4I422663

• Published in:

  Volume: 4 Issue: 4 April 2018

• Publication Date:

  2018-04-13

Download Article