High Speed Multiplier Based On Vedic Mathematics

• Author(s):

  Aishwarya Nawandhar | Ishwari Pamu | Pranali Kanampalliwar | Prof. V. N. Jirafe

• Keywords:

  Vedic Mathematics, UrdhavaTiryakbhyam, VHDL, FPGA.

• Abstract:

  Multipliers Have A Lot Of Applications Like In DSP, FIR Filters, Image Processing, Microprocessors And Communication. Multipliers For Higher Order Multiplications Are Not Very Efficient In Terms Of Speed. Also, A Huge Number Of Compressors Or Adders Are R

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Other Details

• Paper id:

  IJSARTV4I523836

• Published in:

  Volume: 4 Issue: 5 May 2018

• Publication Date:

  2018-05-31

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