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Volume 10 Issue 12 December 2024
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HIGH PERFORMANCE INTEGER DCT ARCHITECTURES FOR HEVC
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Author(s):
V.Sruthi | V.Rekha | M. Subitha, M.Sugitha | S. Jeya Anusuya, V. Satheesh kumar
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Keywords:
Integer DCT, HEVC, 1D DCT Architecture, 2D DCT Architecture
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Abstract:
Our Proposed System Proceeds VLSI Architecture For Integer Discrete Cosine Transform (integer DCT), Which Is Used In Real Time High Efficiency Video Coding (HEVC) Applications. It Has N-point 1D-Integer DCT Architecture, Which Includes Signed Configurable
Other Details
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Paper id:
IJSARTV4I321202
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Published in:
Volume: 4 Issue: 3 March 2018
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Publication Date:
2018-03-04
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