Design Of Low-power High-gain Serializer/deserializer Using Gdi Technique

• Author(s):

  NIRMALADEVI J | V. ANNAPOORANI

• Keywords:

  Adiabatic Logic, GDI Technique, Low Power, High Frequency, SerDes.

• Abstract:

  CMOS Technology Is Evolving Propose And Demonstrate A Serializer/deserializer (SerDes) Toward The Testing Of Large Scale GDI Circuits With Delay-line Clocking. A SerDes, A Pair Of A Serializer (parallel-to-serial Converter) And A Deserializer (serial-to-p

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Other Details

• Paper id:

  IJSARTV10I175482

• Published in:

  Volume: 10 Issue: 1 January 2024

• Publication Date:

  2024-01-08

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