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DESIGN HIGH SPEED MULTIPLIER USING VEDIC MATHEMATICS FOR IIR FILTER
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Author(s):
Pratibha P. Dighe | Aashish Mhaske
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Keywords:
Vedic Mathematics, Multiplier, DSP, IIR Filter, Urdhwa Tiryagbhyam Sutra, MATLAB 8.1, Xilinx 14.5 ISE.
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Abstract:
Digital Signal Processing Operation Utilizing Vedic Mathematics Which Performs The Signal Handling Operation Like Convolution, Circular Convolution, Cross Correlation, Auto-correlation And Filter Design. Digital Signal Processing (DSP) Operations Are Vita
Other Details
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Paper id:
IJSARTV4I925677
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Published in:
Volume: 4 Issue: 9 September 2018
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Publication Date:
2018-09-01
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