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A REVIEW ON INSTRUCTION SET ARCHITECTURE AND CLOCK GATING SIGNALS FOR LOW POWER RISC PROCESSOR
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Author(s):
Asha Rani M | Parvathi S. J
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Keywords:
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Abstract:
The Battery Life Of Portable Electronics Today Makes Power And Energy Consumption Vital Factors. This Paper Presents A Description Of Instruction Set Architecture Design To Reduce Power Consumption And Clock Gating Signals To Reduce The Power Utilizat
Other Details
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Paper id:
IJSARTV2I116005
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Published in:
Volume: 2 Issue: 11 November 2016
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Publication Date:
2016-11-07
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