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Volume 10 Issue 12 December 2024


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A HIGH PERFORMANCE REALIZATION OF 8 BIT REVERSIBLE LFSR ENCRYPTION AND DECRYPTION

  • Author(s):

    T Madhu | A. Suresh Babu | Vidadala Srija

  • Keywords:

    LFSR, PSA, Encryption, Decryption, Reversible, VHDL.

  • Abstract:

    This Paper Presents A Novel Architecture Of Pulse Triggered And Edge Triggered SISO & SIPO Registers. We Are Going To Analyze Their Quantum Cost, Delay And Garbage In Terms Of Some Lemmas. We Will Explain With An Example Of Sequence Pulse Generation With

Other Details

  • Paper id:

    IJSARTV6I838270

  • Published in:

    Volume: 6 Issue: 8 August 2020

  • Publication Date:

    2020-08-05


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