AN EFFICIENT REDUCING TRANSIENT ACTIVITY ON OFF-CHIP DATA BUS WITH DYNAMICALLY VARYING SWITCHING CHARACTERISTICS

Power has become an important design criterion in modern system designs, especially in portable battery-driven applications. A significant portion of total power dissipation is due to the transitions on the off-chip address buses. This is because of the large switching capacitances associated with these bus lines. There are many encoding schemes in the literature that achieve huge reduction in transition activity on the instruction address bus. However, on data and multiplexed address buses, none of the existing schemes consistently achieve significant reduction in transition activity. Also, many of the existing techniques add redundancy in space and/or time. The encoding schemes are proposed that significantly reduce transitions on these buses without adding redundancy in space or time. The TPC algorithm provides the optimal bus encoding, given the probabilistic distribution of the data. The shortcomings are that its effectiveness relies on the accurate information about the data sequence, and the hardware and computation overheads are high and increase exponentially with the increase of bus width. We propose a novel low-energy bus coding scheme. The proposed weighted code mapping (WCM) algorithm generates a one-to-one mapping from the original data to the coded data, which is decided by the probabilistic distribution of the original data.